[−][src]Module core::arch::aarch64

🔬 This is a nightly-only experimental API. (stdsimd #27731)
This is supported on AArch64 only.

Platform-specific intrinsics for the aarch64 platform.

See the module documentation for more details.

Structs

APSRExperimental

Application Program Status Register

SYExperimental

Full system is the required shareability domain, reads and writes are the required access types

float32x2_tExperimental

ARM-specific 64-bit wide vector of two packed f32.

float32x4_tExperimental

ARM-specific 128-bit wide vector of four packed f32.

float64x1_tExperimental

ARM-specific 64-bit wide vector of one packed f64.

float64x2_tExperimental

ARM-specific 128-bit wide vector of two packed f64.

int8x8_tExperimental

ARM-specific 64-bit wide vector of eight packed i8.

int8x8x2_tExperimental

ARM-specific type containing two int8x8_t vectors.

int8x8x3_tExperimental

ARM-specific type containing three int8x8_t vectors.

int8x8x4_tExperimental

ARM-specific type containing four int8x8_t vectors.

int8x16_tExperimental

ARM-specific 128-bit wide vector of sixteen packed i8.

int8x16x2_tExperimental

ARM-specific type containing two int8x16_t vectors.

int8x16x3_tExperimental

ARM-specific type containing three int8x16_t vectors.

int8x16x4_tExperimental

ARM-specific type containing four int8x16_t vectors.

int16x4_tExperimental

ARM-specific 64-bit wide vector of four packed i16.

int16x8_tExperimental

ARM-specific 128-bit wide vector of eight packed i16.

int32x2_tExperimental

ARM-specific 64-bit wide vector of two packed i32.

int32x4_tExperimental

ARM-specific 128-bit wide vector of four packed i32.

int64x1_tExperimental

ARM-specific 64-bit wide vector of one packed i64.

int64x2_tExperimental

ARM-specific 128-bit wide vector of two packed i64.

poly8x8_tExperimental

ARM-specific 64-bit wide polynomial vector of eight packed u8.

poly8x8x2_tExperimental

ARM-specific type containing two poly8x8_t vectors.

poly8x8x3_tExperimental

ARM-specific type containing three poly8x8_t vectors.

poly8x8x4_tExperimental

ARM-specific type containing four poly8x8_t vectors.

poly8x16_tExperimental

ARM-specific 128-bit wide vector of sixteen packed u8.

poly8x16x2_tExperimental

ARM-specific type containing two poly8x16_t vectors.

poly8x16x3_tExperimental

ARM-specific type containing three poly8x16_t vectors.

poly8x16x4_tExperimental

ARM-specific type containing four poly8x16_t vectors.

poly16x4_tExperimental

ARM-specific 64-bit wide vector of four packed u16.

poly16x8_tExperimental

ARM-specific 128-bit wide vector of eight packed u16.

poly64_tExperimental

ARM-specific 64-bit wide vector of one packed p64.

poly64x1_tExperimental

ARM-specific 64-bit wide vector of one packed p64.

poly64x2_tExperimental

ARM-specific 64-bit wide vector of two packed p64.

poly128_tExperimental

ARM-specific 128-bit wide vector of one packed p64.

uint8x8_tExperimental

ARM-specific 64-bit wide vector of eight packed u8.

uint8x8x2_tExperimental

ARM-specific type containing two uint8x8_t vectors.

uint8x8x3_tExperimental

ARM-specific type containing three uint8x8_t vectors.

uint8x8x4_tExperimental

ARM-specific type containing four uint8x8_t vectors.

uint8x16_tExperimental

ARM-specific 128-bit wide vector of sixteen packed u8.

uint8x16x2_tExperimental

ARM-specific type containing two uint8x16_t vectors.

uint8x16x3_tExperimental

ARM-specific type containing three uint8x16_t vectors.

uint8x16x4_tExperimental

ARM-specific type containing four uint8x16_t vectors.

uint16x4_tExperimental

ARM-specific 64-bit wide vector of four packed u16.

uint16x8_tExperimental

ARM-specific 128-bit wide vector of eight packed u16.

uint32x2_tExperimental

ARM-specific 64-bit wide vector of two packed u32.

uint32x4_tExperimental

ARM-specific 128-bit wide vector of four packed u32.

uint64x1_tExperimental

ARM-specific 64-bit wide vector of one packed u64.

uint64x2_tExperimental

ARM-specific 128-bit wide vector of two packed u64.

Constants

_PREFETCH_LOCALITY0Experimental

See prefetch.

_PREFETCH_LOCALITY1Experimental

See prefetch.

_PREFETCH_LOCALITY2Experimental

See prefetch.

_PREFETCH_LOCALITY3Experimental

See prefetch.

_PREFETCH_READExperimental

See prefetch.

_PREFETCH_WRITEExperimental

See prefetch.

_TMFAILURE_CNCLExperimental

Transaction executed a TCANCEL instruction

_TMFAILURE_DBGExperimental

Transaction aborted due to a debug trap.

_TMFAILURE_ERRExperimental

Transaction aborted because a non-permissible operation was attempted

_TMFAILURE_IMPExperimental

Fallback error type for any other reason

_TMFAILURE_INTExperimental

Transaction failed from interrupt

_TMFAILURE_MEMExperimental

Transaction aborted because a conflict occurred

_TMFAILURE_NESTExperimental

Transaction aborted due to transactional nesting level was exceeded

_TMFAILURE_REASONExperimental

Extraction mask for failure reason

_TMFAILURE_RTRYExperimental

Transaction retry is possible.

_TMFAILURE_SIZEExperimental

Transaction aborted due to read or write set limit was exceeded

_TMFAILURE_TRIVIALExperimental

Indicates a TRIVIAL version of TM is available

_TMSTART_SUCCESSExperimental

Transaction successfully started.

Functions

__breakpoint⚠Experimental

Inserts a breakpoint instruction.

__crc32cd⚠Experimentalcrc

CRC32-C single round checksum for quad words (64 bits).

__crc32d⚠Experimentalcrc

CRC32 single round checksum for quad words (64 bits).

__dmb⚠Experimental

Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.

__dsb⚠Experimental

Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.

__isb⚠Experimental

Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.

__nop⚠Experimental

Generates an unspecified no-op instruction.

__rsr⚠Experimental

Reads a 32-bit system register

__rsrp⚠Experimental

Reads a system register containing an address

__tcancel⚠Experimentaltme

Cancels the current transaction and discards all state modifications that were performed transactionally.

__tcommit⚠Experimentaltme

Commits the current transaction. For a nested transaction, the only effect is that the transactional nesting depth is decreased. For an outer transaction, the state modifications performed transactionally are committed to the architectural state.

__tstart⚠Experimentaltme

Starts a new transaction. When the transaction starts successfully the return value is 0. If the transaction fails, all state modifications are discarded and a cause of the failure is encoded in the return value.

__ttest⚠Experimentaltme

Tests if executing inside a transaction. If no transaction is currently executing, the return value is 0. Otherwise, this intrinsic returns the depth of the transaction.

__wsr⚠Experimental

Writes a 32-bit system register

__wsrp⚠Experimental

Writes a system register containing an address

_cls_u32⚠Experimental

Counts the leading most significant bits set.

_cls_u64⚠Experimental

Counts the leading most significant bits set.

_clz_u64⚠Experimental

Count Leading Zeros.

_prefetch⚠Experimental

Fetch the cache line that contains address p using the given rw and locality.

_rbit_u64⚠Experimental

Reverse the bit order.

_rev_u16⚠Experimental

Reverse the order of the bytes.

_rev_u32⚠Experimental

Reverse the order of the bytes.

_rev_u64⚠Experimental

Reverse the order of the bytes.

brk⚠Experimental

Generates the trap instruction BRK 1

vabs_s8⚠Experimentalneon

Absolute value (wrapping).

vabs_s16⚠Experimentalneon

Absolute value (wrapping).

vabs_s32⚠Experimentalneon

Absolute value (wrapping).

vabs_s64⚠Experimentalneon

Absolute Value (wrapping).

vabsd_s64⚠Experimentalneon

Absolute Value (wrapping).

vabsq_s8⚠Experimentalneon

Absolute value (wrapping).

vabsq_s16⚠Experimentalneon

Absolute value (wrapping).

vabsq_s32⚠Experimentalneon

Absolute value (wrapping).

vabsq_s64⚠Experimentalneon

Absolute Value (wrapping).

vadd_f32⚠Experimentalneon

Vector add.

vadd_f64⚠Experimentalneon

Vector add.

vadd_s8⚠Experimentalneon

Vector add.

vadd_s16⚠Experimentalneon

Vector add.

vadd_s32⚠Experimentalneon

Vector add.

vadd_s64⚠Experimentalneon

Vector add.

vadd_u8⚠Experimentalneon

Vector add.

vadd_u16⚠Experimentalneon

Vector add.

vadd_u32⚠Experimentalneon

Vector add.

vadd_u64⚠Experimentalneon

Vector add.

vaddd_s64⚠Experimentalneon

Vector add.

vaddd_u64⚠Experimentalneon

Vector add.

vaddl_s8⚠Experimentalneon

Vector long add.

vaddl_s16⚠Experimentalneon

Vector long add.

vaddl_s32⚠Experimentalneon

Vector long add.

vaddl_u8⚠Experimentalneon

Vector long add.

vaddl_u16⚠Experimentalneon

Vector long add.

vaddl_u32⚠Experimentalneon

Vector long add.

vaddq_f32⚠Experimentalneon

Vector add.

vaddq_f64⚠Experimentalneon

Vector add.

vaddq_s8⚠Experimentalneon

Vector add.

vaddq_s16⚠Experimentalneon

Vector add.

vaddq_s32⚠Experimentalneon

Vector add.

vaddq_s64⚠Experimentalneon

Vector add.

vaddq_u8⚠Experimentalneon

Vector add.

vaddq_u16⚠Experimentalneon

Vector add.

vaddq_u32⚠Experimentalneon

Vector add.

vaddq_u64⚠Experimentalneon

Vector add.

vaddv_s8⚠Experimentalneon

Add across vector

vaddv_s16⚠Experimentalneon

Add across vector

vaddv_s32⚠Experimentalneon

Add across vector

vaddv_u8⚠Experimentalneon

Add across vector

vaddv_u16⚠Experimentalneon

Add across vector

vaddv_u32⚠Experimentalneon

Add across vector

vaddvq_s8⚠Experimentalneon

Add across vector

vaddvq_s16⚠Experimentalneon

Add across vector

vaddvq_s32⚠Experimentalneon

Add across vector

vaddvq_s64⚠Experimentalneon

Add across vector

vaddvq_u8⚠Experimentalneon

Add across vector

vaddvq_u16⚠Experimentalneon

Add across vector

vaddvq_u32⚠Experimentalneon

Add across vector

vaddvq_u64⚠Experimentalneon

Add across vector

vaesdq_u8⚠Experimentalcrypto

AES single round decryption.

vaeseq_u8⚠Experimentalcrypto

AES single round encryption.

vaesimcq_u8⚠Experimentalcrypto

AES inverse mix columns.

vaesmcq_u8⚠Experimentalcrypto

AES mix columns.

vand_s8⚠Experimentalneon

Vector bitwise and

vand_s16⚠Experimentalneon

Vector bitwise and

vand_s32⚠Experimentalneon

Vector bitwise and

vand_s64⚠Experimentalneon

Vector bitwise and

vand_u8⚠Experimentalneon

Vector bitwise and

vand_u16⚠Experimentalneon

Vector bitwise and

vand_u32⚠Experimentalneon

Vector bitwise and

vand_u64⚠Experimentalneon

Vector bitwise and

vandq_s8⚠Experimentalneon

Vector bitwise and

vandq_s16⚠Experimentalneon

Vector bitwise and

vandq_s32⚠Experimentalneon

Vector bitwise and

vandq_s64⚠Experimentalneon

Vector bitwise and

vandq_u8⚠Experimentalneon

Vector bitwise and

vandq_u16⚠Experimentalneon

Vector bitwise and

vandq_u32⚠Experimentalneon

Vector bitwise and

vandq_u64⚠Experimentalneon

Vector bitwise and

vceq_f32⚠Experimentalneon

Floating-point compare equal

vceq_f64⚠Experimentalneon

Floating-point compare equal

vceq_p64⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_s8⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_s16⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_s32⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_s64⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_u8⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_u16⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_u32⚠Experimentalneon

Compare bitwise Equal (vector)

vceq_u64⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_f32⚠Experimentalneon

Floating-point compare equal

vceqq_f64⚠Experimentalneon

Floating-point compare equal

vceqq_p64⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_s8⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_s16⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_s32⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_s64⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_u8⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_u16⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_u32⚠Experimentalneon

Compare bitwise Equal (vector)

vceqq_u64⚠Experimentalneon

Compare bitwise Equal (vector)

vcge_f32⚠Experimentalneon

Floating-point compare greater than or equal

vcge_f64⚠Experimentalneon

Floating-point compare greater than or equal

vcge_s8⚠Experimentalneon

Compare signed greater than or equal

vcge_s16⚠Experimentalneon

Compare signed greater than or equal

vcge_s32⚠Experimentalneon

Compare signed greater than or equal

vcge_s64⚠Experimentalneon

Compare signed greater than or equal

vcge_u8⚠Experimentalneon

Compare unsigned greater than or equal

vcge_u16⚠Experimentalneon

Compare unsigned greater than or equal

vcge_u32⚠Experimentalneon

Compare unsigned greater than or equal

vcge_u64⚠Experimentalneon

Compare unsigned greater than or equal

vcgeq_f32⚠Experimentalneon

Floating-point compare greater than or equal

vcgeq_f64⚠Experimentalneon

Floating-point compare greater than or equal

vcgeq_s8⚠Experimentalneon

Compare signed greater than or equal

vcgeq_s16⚠Experimentalneon

Compare signed greater than or equal

vcgeq_s32⚠Experimentalneon

Compare signed greater than or equal

vcgeq_s64⚠Experimentalneon

Compare signed greater than or equal

vcgeq_u8⚠Experimentalneon

Compare unsigned greater than or equal

vcgeq_u16⚠Experimentalneon

Compare unsigned greater than or equal

vcgeq_u32⚠Experimentalneon

Compare unsigned greater than or equal

vcgeq_u64⚠Experimentalneon

Compare unsigned greater than or equal

vcgt_f32⚠Experimentalneon

Floating-point compare greater than

vcgt_f64⚠Experimentalneon

Floating-point compare greater than

vcgt_s8⚠Experimentalneon

Compare signed greater than

vcgt_s16⚠Experimentalneon

Compare signed greater than

vcgt_s32⚠Experimentalneon

Compare signed greater than

vcgt_s64⚠Experimentalneon

Compare signed greater than

vcgt_u8⚠Experimentalneon

Compare unsigned highe

vcgt_u16⚠Experimentalneon

Compare unsigned highe

vcgt_u32⚠Experimentalneon

Compare unsigned highe

vcgt_u64⚠Experimentalneon

Compare unsigned highe

vcgtq_f32⚠Experimentalneon

Floating-point compare greater than

vcgtq_f64⚠Experimentalneon

Floating-point compare greater than

vcgtq_s8⚠Experimentalneon

Compare signed greater than

vcgtq_s16⚠Experimentalneon

Compare signed greater than

vcgtq_s32⚠Experimentalneon

Compare signed greater than

vcgtq_s64⚠Experimentalneon

Compare signed greater than

vcgtq_u8⚠Experimentalneon

Compare unsigned highe

vcgtq_u16⚠Experimentalneon

Compare unsigned highe

vcgtq_u32⚠Experimentalneon

Compare unsigned highe

vcgtq_u64⚠Experimentalneon

Compare unsigned highe

vcle_f32⚠Experimentalneon

Floating-point compare less than or equal

vcle_f64⚠Experimentalneon

Floating-point compare less than or equal

vcle_s8⚠Experimentalneon

Compare signed less than or equal

vcle_s16⚠Experimentalneon

Compare signed less than or equal

vcle_s32⚠Experimentalneon

Compare signed less than or equal

vcle_s64⚠Experimentalneon

Compare signed less than or equal

vcle_u8⚠Experimentalneon

Compare unsigned less than or equal

vcle_u16⚠Experimentalneon

Compare unsigned less than or equal

vcle_u32⚠Experimentalneon

Compare unsigned less than or equal

vcle_u64⚠Experimentalneon

Compare unsigned less than or equal

vcleq_f32⚠Experimentalneon

Floating-point compare less than or equal

vcleq_f64⚠Experimentalneon

Floating-point compare less than or equal

vcleq_s8⚠Experimentalneon

Compare signed less than or equal

vcleq_s16⚠Experimentalneon

Compare signed less than or equal

vcleq_s32⚠Experimentalneon

Compare signed less than or equal

vcleq_s64⚠Experimentalneon

Compare signed less than or equal

vcleq_u8⚠Experimentalneon

Compare unsigned less than or equal

vcleq_u16⚠Experimentalneon

Compare unsigned less than or equal

vcleq_u32⚠Experimentalneon

Compare unsigned less than or equal

vcleq_u64⚠Experimentalneon

Compare unsigned less than or equal

vclt_f32⚠Experimentalneon

Floating-point compare less than

vclt_f64⚠Experimentalneon

Floating-point compare less than

vclt_s8⚠Experimentalneon

Compare signed less than

vclt_s16⚠Experimentalneon

Compare signed less than

vclt_s32⚠Experimentalneon

Compare signed less than

vclt_s64⚠Experimentalneon

Compare signed less than

vclt_u8⚠Experimentalneon

Compare unsigned less than

vclt_u16⚠Experimentalneon

Compare unsigned less than

vclt_u32⚠Experimentalneon

Compare unsigned less than

vclt_u64⚠Experimentalneon

Compare unsigned less than

vcltq_f32⚠Experimentalneon

Floating-point compare less than

vcltq_f64⚠Experimentalneon

Floating-point compare less than

vcltq_s8⚠Experimentalneon

Compare signed less than

vcltq_s16⚠Experimentalneon

Compare signed less than

vcltq_s32⚠Experimentalneon

Compare signed less than

vcltq_s64⚠Experimentalneon

Compare signed less than

vcltq_u8⚠Experimentalneon

Compare unsigned less than

vcltq_u16⚠Experimentalneon

Compare unsigned less than

vcltq_u32⚠Experimentalneon

Compare unsigned less than

vcltq_u64⚠Experimentalneon

Compare unsigned less than

vcombine_f32⚠Experimentalneon

Vector combine

vcombine_f64⚠Experimentalneon

Vector combine

vcombine_p8⚠Experimentalneon

Vector combine

vcombine_p16⚠Experimentalneon

Vector combine

vcombine_p64⚠Experimentalneon

Vector combine

vcombine_s8⚠Experimentalneon

Vector combine

vcombine_s16⚠Experimentalneon

Vector combine

vcombine_s32⚠Experimentalneon

Vector combine

vcombine_s64⚠Experimentalneon

Vector combine

vcombine_u8⚠Experimentalneon

Vector combine

vcombine_u16⚠Experimentalneon

Vector combine

vcombine_u32⚠Experimentalneon

Vector combine

vcombine_u64⚠Experimentalneon

Vector combine

vcvtq_s32_f32⚠Experimentalneon
vcvtq_u32_f32⚠Experimentalneon

Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector)

vdupq_n_s8⚠Experimentalneon

Duplicate vector element to vector or scalar

vdupq_n_u8⚠Experimentalneon

Duplicate vector element to vector or scalar

veor_s8⚠Experimentalneon

Vector bitwise exclusive or (vector)

veor_s16⚠Experimentalneon

Vector bitwise exclusive or (vector)

veor_s32⚠Experimentalneon

Vector bitwise exclusive or (vector)

veor_s64⚠Experimentalneon

Vector bitwise exclusive or (vector)

veor_u8⚠Experimentalneon

Vector bitwise exclusive or (vector)

veor_u16⚠Experimentalneon

Vector bitwise exclusive or (vector)

veor_u32⚠Experimentalneon

Vector bitwise exclusive or (vector)

veor_u64⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s8⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s16⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s32⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s64⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u8⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u16⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u32⚠Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u64⚠Experimentalneon

Vector bitwise exclusive or (vector)

vextq_s8⚠Experimentalneon

Extract vector from pair of vectors

vextq_u8⚠Experimentalneon

Extract vector from pair of vectors

vget_lane_u8⚠Experimentalneon

Move vector element to general-purpose register

vget_lane_u64⚠Experimentalneon

Move vector element to general-purpose register

vgetq_lane_s32⚠Experimentalneon

Move vector element to general-purpose register

vgetq_lane_u16⚠Experimentalneon

Move vector element to general-purpose register

vgetq_lane_u32⚠Experimentalneon

Move vector element to general-purpose register

vgetq_lane_u64⚠Experimentalneon

Move vector element to general-purpose register

vhadd_s8⚠Experimentalneon

Halving add

vhadd_s16⚠Experimentalneon

Halving add

vhadd_s32⚠Experimentalneon

Halving add

vhadd_u8⚠Experimentalneon

Halving add

vhadd_u16⚠Experimentalneon

Halving add

vhadd_u32⚠Experimentalneon

Halving add

vhaddq_s8⚠Experimentalneon

Halving add

vhaddq_s16⚠Experimentalneon

Halving add

vhaddq_s32⚠Experimentalneon

Halving add

vhaddq_u8⚠Experimentalneon

Halving add

vhaddq_u16⚠Experimentalneon

Halving add

vhaddq_u32⚠Experimentalneon

Halving add

vhsub_s8⚠Experimentalneon

Signed halving subtract

vhsub_s16⚠Experimentalneon

Signed halving subtract

vhsub_s32⚠Experimentalneon

Signed halving subtract

vhsub_u8⚠Experimentalneon

Signed halving subtract

vhsub_u16⚠Experimentalneon

Signed halving subtract

vhsub_u32⚠Experimentalneon

Signed halving subtract

vhsubq_s8⚠Experimentalneon

Signed halving subtract

vhsubq_s16⚠Experimentalneon

Signed halving subtract

vhsubq_s32⚠Experimentalneon

Signed halving subtract

vhsubq_u8⚠Experimentalneon

Signed halving subtract

vhsubq_u16⚠Experimentalneon

Signed halving subtract

vhsubq_u32⚠Experimentalneon

Signed halving subtract

vld1q_dup_f32⚠Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_f32⚠Experimentalneon
vld1q_s8⚠Experimentalneon

Load multiple single-element structures to one, two, three, or four registers

vld1q_s32⚠Experimentalneon
vld1q_u8⚠Experimentalneon

Load multiple single-element structures to one, two, three, or four registers

vld1q_u32⚠Experimentalneon
vmaxq_f32⚠Experimentalneon

Floating-point maxmimum (vector).

vmaxv_f32⚠Experimentalneon

Horizontal vector max.

vmaxv_s8⚠Experimentalneon

Horizontal vector max.

vmaxv_s16⚠Experimentalneon

Horizontal vector max.

vmaxv_s32⚠Experimentalneon

Horizontal vector max.

vmaxv_u8⚠Experimentalneon

Horizontal vector max.

vmaxv_u16⚠Experimentalneon

Horizontal vector max.

vmaxv_u32⚠Experimentalneon

Horizontal vector max.

vmaxvq_f32⚠Experimentalneon

Horizontal vector max.

vmaxvq_f64⚠Experimentalneon

Horizontal vector max.

vmaxvq_s8⚠Experimentalneon

Horizontal vector max.

vmaxvq_s16⚠Experimentalneon

Horizontal vector max.

vmaxvq_s32⚠Experimentalneon

Horizontal vector max.

vmaxvq_u8⚠Experimentalneon

Horizontal vector max.

vmaxvq_u16⚠Experimentalneon

Horizontal vector max.

vmaxvq_u32⚠Experimentalneon

Horizontal vector max.

vminq_f32⚠Experimentalneon

Floating-point minimum (vector).

vminv_f32⚠Experimentalneon

Horizontal vector min.

vminv_s8⚠Experimentalneon

Horizontal vector min.

vminv_s16⚠Experimentalneon

Horizontal vector min.

vminv_s32⚠Experimentalneon

Horizontal vector min.

vminv_u8⚠Experimentalneon

Horizontal vector min.

vminv_u16⚠Experimentalneon

Horizontal vector min.

vminv_u32⚠Experimentalneon

Horizontal vector min.

vminvq_f32⚠Experimentalneon

Horizontal vector min.

vminvq_f64⚠Experimentalneon

Horizontal vector min.

vminvq_s8⚠Experimentalneon

Horizontal vector min.

vminvq_s16⚠Experimentalneon

Horizontal vector min.

vminvq_s32⚠Experimentalneon

Horizontal vector min.

vminvq_u8⚠Experimentalneon

Horizontal vector min.

vminvq_u16⚠Experimentalneon

Horizontal vector min.

vminvq_u32⚠Experimentalneon

Horizontal vector min.

vmovl_s8⚠Experimentalneon

Vector long move.

vmovl_s16⚠Experimentalneon

Vector long move.

vmovl_s32⚠Experimentalneon

Vector long move.

vmovl_u8⚠Experimentalneon

Vector long move.

vmovl_u16⚠Experimentalneon

Vector long move.

vmovl_u32⚠Experimentalneon

Vector long move.

vmovn_s16⚠Experimentalneon

Vector narrow integer.

vmovn_s32⚠Experimentalneon

Vector narrow integer.

vmovn_s64⚠Experimentalneon

Vector narrow integer.

vmovn_u16⚠Experimentalneon

Vector narrow integer.

vmovn_u32⚠Experimentalneon

Vector narrow integer.

vmovn_u64⚠Experimentalneon

Vector narrow integer.

vmovq_n_u8⚠Experimentalneon

Duplicate vector element to vector or scalar

vmul_f32⚠Experimentalneon

Multiply

vmul_f64⚠Experimentalneon

Multiply

vmul_s8⚠Experimentalneon

Multiply

vmul_s16⚠Experimentalneon

Multiply

vmul_s32⚠Experimentalneon

Multiply

vmul_u8⚠Experimentalneon

Multiply

vmul_u16⚠Experimentalneon

Multiply

vmul_u32⚠Experimentalneon

Multiply

vmull_p64⚠Experimentalneon

Polynomial multiply long

vmulq_f32⚠Experimentalneon

Multiply

vmulq_f64⚠Experimentalneon

Multiply

vmulq_s8⚠Experimentalneon

Multiply

vmulq_s16⚠Experimentalneon

Multiply

vmulq_s32⚠Experimentalneon

Multiply

vmulq_u8⚠Experimentalneon

Multiply

vmulq_u16⚠Experimentalneon

Multiply

vmulq_u32⚠Experimentalneon

Multiply

vmvn_p8⚠Experimentalneon

Vector bitwise not.

vmvn_s8⚠Experimentalneon

Vector bitwise not.

vmvn_s16⚠Experimentalneon

Vector bitwise not.

vmvn_s32⚠Experimentalneon

Vector bitwise not.

vmvn_u8⚠Experimentalneon

Vector bitwise not.

vmvn_u16⚠Experimentalneon

Vector bitwise not.

vmvn_u32⚠Experimentalneon

Vector bitwise not.

vmvnq_p8⚠Experimentalneon

Vector bitwise not.

vmvnq_s8⚠Experimentalneon

Vector bitwise not.

vmvnq_s16⚠Experimentalneon

Vector bitwise not.

vmvnq_s32⚠Experimentalneon

Vector bitwise not.

vmvnq_u8⚠Experimentalneon

Vector bitwise not.

vmvnq_u16⚠Experimentalneon

Vector bitwise not.

vmvnq_u32⚠Experimentalneon

Vector bitwise not.

vorr_s8⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_s16⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_s32⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_s64⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u8⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u16⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u32⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u64⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s8⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s16⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s32⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s64⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u8⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u16⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u32⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u64⚠Experimentalneon

Vector bitwise or (immediate, inclusive)

vpadd_s8⚠Experimentalneon

Add pairwise.

vpadd_s16⚠Experimentalneon

Add pairwise.

vpadd_s32⚠Experimentalneon

Add pairwise.

vpadd_u8⚠Experimentalneon

Add pairwise.

vpadd_u16⚠Experimentalneon

Add pairwise.

vpadd_u32⚠Experimentalneon

Add pairwise.

vpaddd_s64⚠Experimentalneon

Add pairwise

vpaddd_u64⚠Experimentalneon

Add pairwise

vpaddq_s8⚠Experimentalneon

Add pairwise

vpaddq_s16⚠Experimentalneon

Add pairwise

vpaddq_s32⚠Experimentalneon

Add pairwise

vpaddq_u8⚠Experimentalneon

Add pairwise

vpaddq_u16⚠Experimentalneon

Add pairwise

vpaddq_u32⚠Experimentalneon

Add pairwise

vpmax_f32⚠Experimentalneon

Folding maximum of adjacent pairs

vpmax_s8⚠Experimentalneon

Folding maximum of adjacent pairs

vpmax_s16⚠Experimentalneon

Folding maximum of adjacent pairs

vpmax_s32⚠Experimentalneon

Folding maximum of adjacent pairs

vpmax_u8⚠Experimentalneon

Folding maximum of adjacent pairs

vpmax_u16⚠Experimentalneon

Folding maximum of adjacent pairs

vpmax_u32⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_f32⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_f64⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_s8⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_s16⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_s32⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_u8⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_u16⚠Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_u32⚠Experimentalneon

Folding maximum of adjacent pairs

vpmin_f32⚠Experimentalneon

Folding minimum of adjacent pairs

vpmin_s8⚠Experimentalneon

Folding minimum of adjacent pairs

vpmin_s16⚠Experimentalneon

Folding minimum of adjacent pairs

vpmin_s32⚠Experimentalneon

Folding minimum of adjacent pairs

vpmin_u8⚠Experimentalneon

Folding minimum of adjacent pairs

vpmin_u16⚠Experimentalneon

Folding minimum of adjacent pairs

vpmin_u32⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_f32⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_f64⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_s8⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_s16⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_s32⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_u8⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_u16⚠Experimentalneon

Folding minimum of adjacent pairs

vpminq_u32⚠Experimentalneon

Folding minimum of adjacent pairs

vqadd_s8⚠Experimentalneon

Saturating add

vqadd_s16⚠Experimentalneon

Saturating add

vqadd_s32⚠Experimentalneon

Saturating add

vqadd_u8⚠Experimentalneon

Saturating add

vqadd_u16⚠Experimentalneon

Saturating add

vqadd_u32⚠Experimentalneon

Saturating add

vqaddq_s8⚠Experimentalneon

Saturating add

vqaddq_s16⚠Experimentalneon

Saturating add

vqaddq_s32⚠Experimentalneon

Saturating add

vqaddq_u8⚠Experimentalneon

Saturating add

vqaddq_u16⚠Experimentalneon

Saturating add

vqaddq_u32⚠Experimentalneon

Saturating add

vqmovn_u64⚠Experimentalneon

Unsigned saturating extract narrow.

vqsub_s8⚠Experimentalneon

Saturating subtract

vqsub_s16⚠Experimentalneon

Saturating subtract

vqsub_s32⚠Experimentalneon

Saturating subtract

vqsub_u8⚠Experimentalneon

Saturating subtract

vqsub_u16⚠Experimentalneon

Saturating subtract

vqsub_u32⚠Experimentalneon

Saturating subtract

vqsubq_s8⚠Experimentalneon

Saturating subtract

vqsubq_s16⚠Experimentalneon

Saturating subtract

vqsubq_s32⚠Experimentalneon

Saturating subtract

vqsubq_u8⚠Experimentalneon

Saturating subtract

vqsubq_u16⚠Experimentalneon

Saturating subtract

vqsubq_u32⚠Experimentalneon

Saturating subtract

vqtbl1_p8⚠Experimentalneon

Table look-up

vqtbl1_s8⚠Experimentalneon

Table look-up

vqtbl1_u8⚠Experimentalneon

Table look-up

vqtbl1q_p8⚠Experimentalneon

Table look-up

vqtbl1q_s8⚠Experimentalneon

Table look-up

vqtbl1q_u8⚠Experimentalneon

Table look-up

vqtbl2_p8⚠Experimentalneon

Table look-up

vqtbl2_s8⚠Experimentalneon

Table look-up

vqtbl2_u8⚠Experimentalneon

Table look-up

vqtbl2q_p8⚠Experimentalneon

Table look-up

vqtbl2q_s8⚠Experimentalneon

Table look-up

vqtbl2q_u8⚠Experimentalneon

Table look-up

vqtbl3_p8⚠Experimentalneon

Table look-up

vqtbl3_s8⚠Experimentalneon

Table look-up

vqtbl3_u8⚠Experimentalneon

Table look-up

vqtbl3q_p8⚠Experimentalneon

Table look-up

vqtbl3q_s8⚠Experimentalneon

Table look-up

vqtbl3q_u8⚠Experimentalneon

Table look-up

vqtbl4_p8⚠Experimentalneon

Table look-up

vqtbl4_s8⚠Experimentalneon

Table look-up

vqtbl4_u8⚠Experimentalneon

Table look-up

vqtbl4q_p8⚠Experimentalneon

Table look-up

vqtbl4q_s8⚠Experimentalneon

Table look-up

vqtbl4q_u8⚠Experimentalneon

Table look-up

vqtbx1_p8⚠Experimentalneon

Extended table look-up

vqtbx1_s8⚠Experimentalneon

Extended table look-up

vqtbx1_u8⚠Experimentalneon

Extended table look-up

vqtbx1q_p8⚠Experimentalneon

Extended table look-up

vqtbx1q_s8⚠Experimentalneon

Extended table look-up

vqtbx1q_u8⚠Experimentalneon

Extended table look-up

vqtbx2_p8⚠Experimentalneon

Extended table look-up

vqtbx2_s8⚠Experimentalneon

Extended table look-up

vqtbx2_u8⚠Experimentalneon

Extended table look-up

vqtbx2q_p8⚠Experimentalneon

Extended table look-up

vqtbx2q_s8⚠Experimentalneon

Extended table look-up

vqtbx2q_u8⚠Experimentalneon

Extended table look-up

vqtbx3_p8⚠Experimentalneon

Extended table look-up

vqtbx3_s8⚠Experimentalneon

Extended table look-up

vqtbx3_u8⚠Experimentalneon

Extended table look-up

vqtbx3q_p8⚠Experimentalneon

Extended table look-up

vqtbx3q_s8⚠Experimentalneon

Extended table look-up

vqtbx3q_u8⚠Experimentalneon

Extended table look-up

vqtbx4_p8⚠Experimentalneon

Extended table look-up

vqtbx4_s8⚠Experimentalneon

Extended table look-up

vqtbx4_u8⚠Experimentalneon

Extended table look-up

vqtbx4q_p8⚠Experimentalneon

Extended table look-up

vqtbx4q_s8⚠Experimentalneon

Extended table look-up

vqtbx4q_u8⚠Experimentalneon

Extended table look-up

vreinterpret_u64_u32⚠Experimentalneon

Vector reinterpret cast operation

vreinterpretq_s8_u8⚠Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u8_s8⚠Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u16_u8⚠Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u32_u8⚠Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u64_u8⚠Experimentalneon

Vector reinterpret cast operation

vrhadd_s8⚠Experimentalneon

Rounding halving add

vrhadd_s16⚠Experimentalneon

Rounding halving add

vrhadd_s32⚠Experimentalneon

Rounding halving add

vrhadd_u8⚠Experimentalneon

Rounding halving add

vrhadd_u16⚠Experimentalneon

Rounding halving add

vrhadd_u32⚠Experimentalneon

Rounding halving add

vrhaddq_s8⚠Experimentalneon

Rounding halving add

vrhaddq_s16⚠Experimentalneon

Rounding halving add

vrhaddq_s32⚠Experimentalneon

Rounding halving add

vrhaddq_u8⚠Experimentalneon

Rounding halving add

vrhaddq_u16⚠Experimentalneon

Rounding halving add

vrhaddq_u32⚠Experimentalneon

Rounding halving add

vrsqrte_f32⚠Experimentalneon

Reciprocal square-root estimate.

vsha1cq_u32⚠Experimentalcrypto

SHA1 hash update accelerator, choose.

vsha1h_u32⚠Experimentalcrypto

SHA1 fixed rotate.

vsha1mq_u32⚠Experimentalcrypto

SHA1 hash update accelerator, majority.

vsha1pq_u32⚠Experimentalcrypto

SHA1 hash update accelerator, parity.

vsha1su0q_u32⚠Experimentalcrypto

SHA1 schedule update accelerator, first part.

vsha1su1q_u32⚠Experimentalcrypto

SHA1 schedule update accelerator, second part.

vsha256h2q_u32⚠Experimentalcrypto

SHA256 hash update accelerator, upper part.

vsha256hq_u32⚠Experimentalcrypto

SHA256 hash update accelerator.

vsha256su0q_u32⚠Experimentalcrypto

SHA256 schedule update accelerator, first part.

vsha256su1q_u32⚠Experimentalcrypto

SHA256 schedule update accelerator, second part.

vshlq_n_u8⚠Experimentalneon

Shift right

vshrq_n_u8⚠Experimentalneon

Unsigned shift right

vsub_f32⚠Experimentalneon

Subtract

vsub_f64⚠Experimentalneon

Subtract

vsub_s8⚠Experimentalneon

Subtract

vsub_s16⚠Experimentalneon

Subtract

vsub_s32⚠Experimentalneon

Subtract

vsub_s64⚠Experimentalneon

Subtract

vsub_u8⚠Experimentalneon

Subtract

vsub_u16⚠Experimentalneon

Subtract

vsub_u32⚠Experimentalneon

Subtract

vsub_u64⚠Experimentalneon

Subtract

vsubq_f32⚠Experimentalneon

Subtract

vsubq_f64⚠Experimentalneon

Subtract

vsubq_s8⚠Experimentalneon

Subtract

vsubq_s16⚠Experimentalneon

Subtract

vsubq_s32⚠Experimentalneon

Subtract

vsubq_s64⚠Experimentalneon

Subtract

vsubq_u8⚠Experimentalneon

Subtract

vsubq_u16⚠Experimentalneon

Subtract

vsubq_u32⚠Experimentalneon

Subtract

vsubq_u64⚠Experimentalneon

Subtract

vtbl1_p8⚠Experimentalneon

Table look-up

vtbl1_s8⚠Experimentalneon

Table look-up

vtbl1_u8⚠Experimentalneon

Table look-up

vtbl2_p8⚠Experimentalneon

Table look-up

vtbl2_s8⚠Experimentalneon

Table look-up

vtbl2_u8⚠Experimentalneon

Table look-up

vtbl3_p8⚠Experimentalneon

Table look-up

vtbl3_s8⚠Experimentalneon

Table look-up

vtbl3_u8⚠Experimentalneon

Table look-up

vtbl4_p8⚠Experimentalneon

Table look-up

vtbl4_s8⚠Experimentalneon

Table look-up

vtbl4_u8⚠Experimentalneon

Table look-up

vtbx1_p8⚠Experimentalneon

Extended table look-up

vtbx1_s8⚠Experimentalneon

Extended table look-up

vtbx1_u8⚠Experimentalneon

Extended table look-up

vtbx2_p8⚠Experimentalneon

Extended table look-up

vtbx2_s8⚠Experimentalneon

Extended table look-up

vtbx2_u8⚠Experimentalneon

Extended table look-up

vtbx3_p8⚠Experimentalneon

Extended table look-up

vtbx3_s8⚠Experimentalneon

Extended table look-up

vtbx3_u8⚠Experimentalneon

Extended table look-up

vtbx4_p8⚠Experimentalneon

Extended table look-up

vtbx4_s8⚠Experimentalneon

Extended table look-up

vtbx4_u8⚠Experimentalneon

Extended table look-up