Subject: Re: [payload] SDP O/A -- L, D, ToP and Flexible mode

From: Bernard Aboba <[email-masked]>
Date: Tue, 12 Feb 2019 23:08:53 +0000

On Feb 12, 2019, at 2:12 PM, Varun Singh <[email-masked]> wrote:
> 
> Do ToP modes 0, 1, and 2 implicitly mean no RTX?

[BA] I believe that is what is implicit now, though it doesn’t make much sense to me.

> If so, why do we have this following ambiguity  (L, D, ToP are all missing) means it is both Flexfec FEC and flexfec RTX?

[BA] Good question. For me, flexible versus fixed and rtx/no rtx are orthogonal questions.

> I think the implicit assumption is that all of  flex FEC spec is implemented.  
> 
> Offer can send and receive  X and answerer can send and receive Y. 
> 
> I can’t see why we would endorse a partial implementation?

[BA] I agree that all major features and bitmask sizes should be mandatory to implement. Would also like to see requirements on supported L and D values. With this clarified the declarative model would work much better.