Subject: [NEXTEL-1] New Filter Bank Technology Reconfigures RF Spectrum On-the-Fly

From: Marcel <[email-masked]>
Date: Wed, 09 Apr 2003 03:16:37 -0400

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New Filter Bank Technology Reconfigures RF Spectrum
On-the-Fly

By Mark Long -- , 3/31/2003

UK-based RF Engines Ltd. has introduced a new Tuneable Pipelined Frequency Transform
(TPFT) filter bank design for software-defined radio (SDR) applications.

The technology reportedly gives users the ability to dynamically select
and acquire spectrum channels of differing bandwidths over a broad range of
spectrum, and then process those channels in real time.

Based on the company's Pipelined Frequency Transform architecture, the new
TPFT architecture is targeted at software-defined radio (SDR) applications that
require the re-configuration of RF front-end circuits while on-the-fly to
accommodate a variety of channel frequency plans. The SDR applications range
from wideband multi-standard satellite and wireless base station receivers to
instrumentation that require the channelization of wideband signals of up to 150
MHz into different size frequency bins that may be arbitrarily distributed
across the input spectrum.

The company reports that its TPFT design also features the ability to
disregard the processing of those sections of spectrum that are not of interest.
In addition, the technology give users the freedom to tailor the design to their
requirements, allowing them to define the filer characteristics, specify
channels by center frequency and bandwidth, and reconfigure to a different
frequency plan or plans in real-time, as required.

The dynamic channel re-configuration capability incorporates a constant
channel capability that will not `drop' channels that are not affected by the
re-configuration process. In addition, the technology incorporates spectral
shaping masks that can be directly applied onto the outputs within the
architecture itself, to allow even the final filter shapes to be finely tuned to
the needs of each individual application.

The  company's TPFT architecture is designed to achieve successive band
splitting in a pipelined manner, with the input spectrum  split into
multiple channels at each successive stage. A typical TPFT implementation would
consists of 10 pipelined stages, providing in excess of 800 usable frequency
channels at the finest frequency resolution or fewer channels if wider frequency
bins are also required. The first stage splits the input in two frequency bands,
the second stage into four, and so on.

According to the company, tuning is achieved by controlling the channel
assignment process from outside the TPFT itself to allow for reconfiguration on
demand. A Windows-based Graphical User Interface (GUI) allows a PC to control
the entire architecture, modifying the required parameters as required.

The TPFT is an alternative to standard Digital Down Converter (DDC)
techniques that the company claims can offer significant advantages in terms of
silicon utilization. The highly pipelined architecture is  reportedly best
suited for targeting ASICs or the latest generation FPGAs from Xilinx and
Altera, which will allow very complex DSP architectures such as the TPFT to be
implemented on a single mid-range device. In addition, RF Engines expects that
with the introduction of new SoC-capable devices such as the Virtex-II PRO from
Xilinx, the whole system, including filter bank and controls, could be
implemented on a stand-alone platform.

For additional information on RF Engines' filter bank design, see
the company's Tuneable
Pipelined Frequency Transform (TPFT) White Paper in the pdf file
format.

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